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U2101B
Relay Timer
Description
The U2101B monolithic integrated bipolar circuit is a versatile timer device for relay control. Because of two integrated, freely configurable operational amplifiers, it covers a very wide range of applications.
Features
D D D D D D
Adjustable window for trigger input Enable input for triggering Adjustable noise suppression Adjustable and retriggerable tracking time Enable and block delay Two integrated operational amplifiers freely connectable
Applications
D D D D D
Motion detectors Tracking controllers Multiple timer Conditional switches Clock generators
*
D 50 mA relay driver
Package: DIP16, SO16
95 9738
1 Ra 15 + 14 - OP 1 60 kW Rb 40 kW VRef -5V fosc1 Window adjustment + OP 2 - 3 4 GND 12 11 RC oscillator 1 Timer 1 1024 Tosc1 Voltage limitation 5 -VS 6 10 Trigger window On: 4 Tosc2 Voltage monitoring Control logic Relay driver 50 mA fosc2 8 16
2
13
Restart on: 64 Tosc2 Out (On): 0.1 VRef Out (Off): 0.5 VRef 9 Enable schmitt trigger On: 0.6 VRef Noise suppression
7
On / Off: 1024 Tosc2 Timer 2, 3, 4 RC oscillator 2
Figure 1. Block diagram
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U2101B
330 nF/ 400 V C1 3 VRef C3 4.7 mF GND 5 Voltage limitation Timer 1 1024 Tosc1 -VS 6 Relay 24 V Relay driver 7 Control logic Window adjustment RC oscillator 1 BZX85/ C20 D1 C2 47 m F/ 35 V 4 -5V Voltage monitoring
4x BYT56
Vmains 230 V
X
Figure 2. Block diagram with typical circuit
N Noise suppression Rosc2 ON / OFF 1024 Tosc2 fosc2 8 Cosc2 RC oscillator 2 Timer 2, 3, 4
TELEFUNKEN Semiconductors Rev. A1, 30-May-96
95 9737
~
2 (9)
Ra 60 kW 16 Rb 40 kW VRef + OP 1 - 14 15 R1 2 Sensor 1 - OP 2 + 1 Feedback circuit 13 12 fosc1 Rosc1 Cosc1 11 R3 Trigger window ON: 4 T osc2 Restart ON: 64 Tosc2 10 R4 Out (ON): 0.1 VRef Out (OFF): 0.5 VRef Enable schmitt trigger ON: 0.6 VRef 9 R2 Sensor 2
L
390 W
Load
U2101B
Pin Description
Divider OP2+ 1 2 16 OP2OUT 15 OP1+ 14 OP1- 13 OP1OUT Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Function Voltage divider Non-inverting input OP2 Inverting input OP2 Reference voltage -5V Ground Supply voltage Output RC oscillator 2 (noise suppression) EN Enable input TRIG Trigger input WINA Trigger window adjustment Osc1 RC oscillator 1 (tracking time) OP1OUT Output OP1 OP1- Inverting input OP1 OP1+ Non-inverting input OP1 OP2OUT Output OP2 Symbol Divider OP2+ OP2- VRef GND -VS OUT Osc2
OP2- 3 VRef GND -VS OUT Osc2 4
U2101B
5 6 7 8
95 9741
12 Osc1 11 WINA 10 TRIG 9 EN
Supply, Pin 6
The voltage limitation in U2101B allows a simple capacitive supply which is derived from the mains voltage via a bridge rectifier (see figure 3). 95 9740 L R1
U2101B
VRef 4 GND 5 D1 -VS 6 OUT 7 C1
Load
Vmains
BZX85 /C20
Relay 24 V
C3
C2 N
Figure 3. Supply
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U2101B
Capacitor C1 is calculated as follows: X C1
+ 0.85
V mains-V S I tot
V9 0 OFF 0.5/0.1 VRef Hysteresis 0.6 VRef ON VRef
94 9299
where Itot = IS + IRel + IX IS = current consumption of the IC without load IRel = relay current IX = current consumption of the external components C1
+
1
w
X C1
The following applies for R1: R1 1 [ 10 X
C1
Figure 4. Trigger condition, Pin 9
V10
At Pin 4, the circuit provides a stabilized reference voltage of -5 V.
0 ON 0.05 0.6 VRef 0.05 VRef + 0.15 V11-4 ON VRef
95 9739
Voltage Monitoring
While the operating voltage is being built up or reduced, uncontrolled states and activation of the output stage are prevented by the internal monitoring circuit. All latches in the circuit, the divider and the control logic are reset. After the supply voltage is applied, a single operating cycle is started independently of the trigger inputs in order to immediately make the entire function visible.
VRef + 0.15 V11-4
OFF
Figure 5. Trigger condition, Pin 10
Trigger Inputs, Pins 9 and 10
The trigger condition for the time stage is determined by the two input Pins 9 and 10. To initiate a triggering operation, both inputs must be in the ON state, since they are equivalent and AND connected. The tracking time begins when the trigger condition finishes. The output remains in the ON state until the tracking time is over. The enable input, Pin 9, is designed as a comparator with hysteresis. The blocking threshold is switched over by the noise suppression in order to avoid faults as a result of load switching (see figure 4). The trigger input, Pin 10, is designed as a window discriminator. The window is adjusted at Pin 11. When V11 = V4, the minimum window of approximately 250 mV is set. When V11 = V5, the maximum window is approximately 1 V. The window discriminator is in the OFF state when the voltage at Pin 10 is within the window set at Pin 11 (see figure 5). If a resistor divider with a NTC resistor is connected at Pin 11, it is possible to compensate for the temperature dependence of an IR sensor, for example. This means that the range becomes temperature independent. 4 (9)
Noise Suppression, Pin 8
The internal noise suppression ensures that peak noise signals at the inputs do not cause undesired triggering. Also, triggering is prevented for a certain time after the load is switched off in order to avoid any intrinsic fault. The delay times are derived from oscillator 2 at Pin 8, the frequency, fosc2, of which is calculated as follows: f osc2
+
1.6
1 R osc2
C osc2
,
whereas Cosc2 should not be greater than 1mF. This gives the period duration Tosc2: T osc2 [s]
+ 1600
R osc2 [kW]
C osc2 [mF]
The enable input, Pin 9, is buffered for 1024 Tosc2 during switching on and switching off, and the input of the window discriminator at Pin 10 is buffered for 4 Tosc2 during switching on and for 64 Tosc2 in the case of switching back on. Appropriately selecting Rosc2 and Cosc2 at Pin 8 allows any delay times to be adjusted so that they can be adapted to the respective requirements. TELEFUNKEN Semiconductors Rev. A1, 30-May-96
U2101B
RC Oscillator 1, Pin 12
The oscillator 1 with the following divider stage 1:1024 allows a very long and reproducible tracking time tt. The circuitry of Pin 12 for a certain tracking time tt can be calculated as follows: R osc1 [kW]
Voltage Divider, Pin 1
Two freely connectable operational amplifiers, OP1 and OP2, are used to evaluate several sensor signals. The tap of a voltage divider between GND and VRef with a voltage level of 0.6 VRef is available at Pin 1. The middle of the discriminator window is also at this value. Assuming that the output of one operational amplifier is connected at the trigger input, Pin 10 (window discriminator), the dc operating point of this operational amplifier can be adjusted without additional external resistors by connecting the input to Pin 1. This value is approximately in the center of the dynamic range of the OP.
+ 1.6
t t [s] 1024
10 3 C osc1 [mF]
whereas Cosc1 should not be greater than 1mF.
Absolute Maximum Ratings
Reference point Pin 5, unless otherwise specified Parameters Power supply Current t < 10 ms Reference voltage source Output current Output stage Output voltage Input currents Symbol Pin 6 Pin 6 Pin 4 Pin 7 Pin 13 and 16 -IS -iS IO -VO Value 15 60 5 VS to 1.8 5 VRef to 0 -40 to +125 +125 -10 to +100 Unit mA mA mA V mA V C C C
"I
I
Input voltages Pins 1, 2, 3, 8, 9, 10, 11, 12, 14, 15 Storage temperature range Junction temperature Ambient temperature range
VI Tstg Tj Tamb
Thermal Resistance
Junction ambient Parameters DIP 16 SO 16 on PC board SO 16 on ceramic Symbol RthJA Maximum 120 180 100 Unit K/W
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U2101B
Electrical Characteristics
VS = -18 V, Tamb = 25_C, reference point Pin 5, unless otherwise specified Parameters Supply voltage limitation Current consumption Test Conditions / Pins IS = -2 mA Pin 6 Pin 6 IS = -5 mA VS=-18V, output stage OFF V3 < V2, V14 < V15 Pin 6 V3 > V2, V14 > V15 Pin 6 Pin 6 Symbol -VS -VS -IS -IS -VSon -VSoff -VRef -VRef Ra Rb Ra/Rb VO II VTU VTL II 13.5 5 4.75 4.55 45 30 1.45 1,75 15 6.5 5 5 60 40 1.5 2 Min. 20.5 20.6 Typ. 22 22.1 Max. 23.5 24 1.75 4 16.5 7.5 5.25 5.25 75 50 1.55 2.25 Unit V
mA
Voltage monitoring Switch-on threshold Switch-off threshold Reference voltage
V V
I4 = 0.1 mA Pin 4 Pin 4 I4 = 3 mA Voltage divider reference point Pin 4 Pin 1 Voltage divider resistor Ra Voltage divider resistor Rb Resistance ratio Output voltage Window discriminator reference point Pin 4 Input current V4 < V10 < V5 Pin 10 Upper threshold Pins 10 and 11 Lower threshold Pins 10 and 11 Input current window V4 < V11 < V5 Pin 11 adjustment Minimum window: V11 = V4 Pin 10 Lower threshold Upper threshold Maximum window: V11 = V5 Pin 10 Lower threshold Upper threshold Delay time Switch-on Pin 10-7 Restart-on Enable Schmitt trigger reference point Pin 4 Pin 9 Input current V4 < V9 < V5 Threshold ON Threshold OFF (off-state) Threshold OFF (on-state) Delay time Switch-on Pin 9-7 Switch-off Output stage reference point Pin 6 Saturation voltage I7 = 25 mA Pin 7 Output current V7 = V5 (t < 1 ms) Pin 7
kW kW - V
0.1 0.5 0.45 |VRef | + 0.15 V11 0.35 |VRef | - 0.15 V11 0.2 0.7
mA mA
V
VTL1 VTU1 VTL2 VTU2 td (ON1) td (ON2) II VT1/VRef VT2/VRef VT3/VRef td (ON) td (OFF) VSat IO
1.55 1 55 2.05 0.8 2.6
1.75 1 75 2.25 1 3 4 Tosc2 64 Tosc2 0.1 0.4 0.5 0.9 1024 tosc2 1024 tosc2
1.95 1 95 2.45 1.2 3.4
V s
0.38 0.47 0.87
0.5 0.42 0.53 0.93
mA
- - - s
2 50
V mA
6 (9)
TELEFUNKEN Semiconductors Rev. A1, 30-May-96
U2101B
Parameters Test Conditions / Pins Symbol Oscillator 1, Tosc1 reference point Pin 4 Pin 12 Input current V4 < V12 < VTU II VTU/VRef Upper threshold VTL Lower threshold II Operating current range Idis Discharge current Oscillator 2, Tosc2 reference point Pin 4 Pin 8 Input current V4 < V8 < VTU II VTU/VRef Upper threshold VTL Lower threshold II Operating current range Idis Discharge current Operational amplifier reference point Pin 4 Pins 2, 3, 14 and 15 Input current II IIO Input offset current VIO Input offset voltage dVIO/dT Temp. coefficient VIO Common-mode input VICR voltage range Output current VO = 2.5 V IO Pins 13 and 16 Output voltage: IO = 100 mA VOL Lower limit Pins 13 and 16 -VOU Upper limit Min. Typ. Max. 0.1 0.85 0.5 1800 Unit
mA mA
mA - V
0.75 2 5
0.8 0.3
0.75 2 5
0.8 0.3
0.1 0.85 0.5 1800
mA mA
mA - V
25 2.5 2 7 0.1 1
75 25 7 3
mV/K
V mA
nA nA mV
0.9 1.6
V
TELEFUNKEN Semiconductors Rev. A1, 30-May-96
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U2101B
Dimensions in mm
Package: DIP16
94 9128
Package: SO16
94 8875
8 (9)
TELEFUNKEN Semiconductors Rev. A1, 30-May-96
U2101B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2831, Fax number: 49 ( 0 ) 7131 67 2423
TELEFUNKEN Semiconductors Rev. A1, 30-May-96
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